Haiying Wang d111d6382c Empirically set cpo and clk_adjust for mpc85xx DDR2 support ...

This patch is against u-boot-mpc85xx.git of www.denx.com

Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.

Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

2007-08-14 01:45:51 -05:00

..

commproc.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

config.mk

Patches by Martin Krause, 22 Mar 2005:

2005-03-27 23:41:39 +00:00

cpu_init.c

Fix minor 85xx warnings

2007-08-14 01:39:14 -05:00

cpu.c

Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx

2007-05-17 00:07:21 +02:00

ether_fcc.c

cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.

2007-07-10 10:27:39 -05:00

interrupts.c

85xx start.S cleanup and exception support

2007-08-14 01:34:21 -05:00

Makefile

Converted all 85xx boards to use a common FSL I2C driver.

2006-10-20 15:50:15 -05:00

pci.c

Cleaned up some 85xx PCI bugs

2007-05-02 15:50:13 -05:00

resetvec.S

* Patches by Xianghua Xiao, 15 Oct 2003:

2003-10-15 23:53:47 +00:00

serial_scc.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

spd_sdram.c

Empirically set cpo and clk_adjust for mpc85xx DDR2 support

2007-08-14 01:45:51 -05:00

speed.c

Reworked 85xx speed detection code

2007-04-23 19:58:28 -05:00

start.S

Use an absolute address when jumping out of 4k boot page

2007-08-14 01:45:09 -05:00

traps.c

85xx start.S cleanup and exception support

2007-08-14 01:34:21 -05:00