Andy Fleming 9343dbf85b Tweak DDR ECC error counter ...

Enable single-bit error counter when memory was cleared by ddr controller.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

2007-04-23 19:58:28 -05:00

..

commproc.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

config.mk

Patches by Martin Krause, 22 Mar 2005:

2005-03-27 23:41:39 +00:00

cpu_init.c

* Add Flat Dev Tree construction for MPC85xx ADS and CDS boards

2006-06-28 10:43:36 -05:00

cpu.c

85xx: write MAC address to mac-address and local-mac-address

2007-04-23 19:58:28 -05:00

ether_fcc.c

Fix DPRAM offset/size for MPC8541/8555.

2005-12-06 15:02:31 +01:00

interrupts.c

Fix timer handling on MPC85xx systems

2005-05-13 22:49:36 +00:00

Makefile

Converted all 85xx boards to use a common FSL I2C driver.

2006-10-20 15:50:15 -05:00

pci.c

* Fix a bunch of compiler warnings for gcc 4.0

2006-10-19 11:33:52 -05:00

resetvec.S

* Patches by Xianghua Xiao, 15 Oct 2003:

2003-10-15 23:53:47 +00:00

serial_scc.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

spd_sdram.c

Tweak DDR ECC error counter

2007-04-23 19:58:28 -05:00

speed.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

start.S

u-boot: v2: Remove the fixed TLB and LAW entrynubmer

2007-04-23 19:58:27 -05:00

traps.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00