678 lines
21 KiB
C
678 lines
21 KiB
C
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/*
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* (C) Copyright 2004-2009
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* Texas Instruments, <www.ti.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/cpu.h>
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#include <asm/io.h>
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#include <asm/arch/bits.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_info.h>
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#include <asm/arch/clocks.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/i2c.h>
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#include <asm/memprot.h>
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#include <tomtom.h>
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#include <i2c.h>
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#include <mmc.h>
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#include <asm/mach-types.h>
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#include <linux/mtd/nand_ecc.h>
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#include <twl4030.h>
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#include <flipflop.h>
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#include "logo.h"
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#include "mfd_feat.h"
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#include <plat-tomtom/offenburg/offenburg.h>
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/* Before including the padconfig settings, we have to set proper config */
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#define BOOTLOADER_UBOOT_PADCONFIG
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#if defined(__VARIANT_STUTTGART_B1)
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# include <linux/padconfig_stuttgart_b1.h>
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#elif defined( __VARIANT_RENNES_B1)
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# include <linux/padconfig_rennes_b1.h>
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#elif defined(__VARIANT_A1)
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# include <linux/padconfig_strasbourg.h>
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#else
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# include <linux/padconfig_strasbourg_a2.h>
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#endif
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#define GPIO_LCD_UD (12)
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#define GPIO_LCD_LR (19)
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#define GPIO_LCM_PWR_ON (137)
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#define GPIO_nLCD_RESET (156)
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#define GPIO_BACKLIGHT_ON (65)
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#define GPIO_SENSE_11V0 (17)
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#define SENSE_11V0_MAX_RETRY (5)
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DECLARE_GLOBAL_DATA_PTR;
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extern void detect_boot_mode(void);
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extern void hw_watchdog_init(void);
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extern const uchar __diagsys_start;
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#define DIAGSYS_ADDR_START (&__diagsys_start)
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extern const uchar __diagsys_end;
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#define DIAGSYS_ADDR_END (&__diagsys_end)
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#define DIAGSYS_LEN ((size_t) (DIAGSYS_ADDR_END - \
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DIAGSYS_ADDR_START))
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#define DIAGSYS_ADDR_NOR ((uchar *) 0x08300000UL)
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#define DEFAULT_FDT_START ((uchar *) 0x81FE0000UL)
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#define DEFAULT_FDT_LEN ((size_t) 0xe00U) /* 7 sectors */
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unsigned exec_applet = 0;
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extern const int __framebuffer_start;
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#define FRAMEBUFFER_ADDR_START 0x83000000
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extern const int __framebuffer_end;
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#define FRAMEBUFFER_ADDR_END (&__framebuffer_end)
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#define FRAMEBUFFER_LEN ((size_t) (FRAMEBUFFER_ADDR_END - \
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FRAMEBUFFER_ADDR_START))
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#define FDT_SCR_ROT_OFFSET (0x1150)
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#define FDT_SCR_VCOM_OFFSET (0x124e)
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#define EOL_SAT_TUN_OFFSET (0x0113)
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/* Timer related definitions */
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#define OMAP34XX_GPTIMER10_BASE (0x48086000)
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#define TIMER_CTRL_GPOCFG (1 << 14)
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#define TIMER_CTRL_CAPTMODE (1 << 13)
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#define TIMER_CTRL_PT (1 << 12)
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#define TIMER_CTRL_TRG_OVERFLOW (1 << 10)
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#define TIMER_CTRL_TRG_OVERFLOW_MATCH (2 << 10)
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#define TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
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#define TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
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#define TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
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#define TIMER_CTRL_SCPWM (1 << 7)
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#define TIMER_CTRL_CE (1 << 6) /* compare enable */
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#define TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
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#define TIMER_CTRL_POSTED (1 << 2)
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#define TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
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#define TIMER_CTRL_ST (1 << 0) /* start timer */
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/* CONTROL_PROG_IO1 bit definitions */
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#define PRG_SDMMC1_SPEEDCTRL (1 << 20)
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void eth_init(void *);
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#ifdef __VARIANT_A1
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# define BOOTDEV_SDCARD 0
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# define BOOTDEV_MOVI 1
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#else
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# define BOOTDEV_MOVI 0
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#endif
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extern unsigned char __mmu_table_start;
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/* Fudge kernel bootdevice on A1 if sd card is present:
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* - root=/dev/mmcblk0p2 if no SD card present OR if booting from SD
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* - root=/dev/mmcblk1p2 if have SD card and booting from movi
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*/
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int kernel_root_num = 0;
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static unsigned char sat_tun = 0;
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/*****************************************
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* Routine: board_init
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* Description: Early hardware init.
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*****************************************/
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int board_init(void)
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{
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detect_boot_mode();
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if (get_device_type() != GP_DEVICE) {
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set_default_map((uint32_t) &__mmu_table_start);
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}
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dcache_enable();
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if (SYSBOOT_MODE_COLD == gd->tomtom.sysboot_mode)
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/* cold boot => initialize the flipflop, we can't rely on the
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state of the scratchpad register */
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flipflop_set(0);
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/* In general, load the kernel from MoviNAND; on A1 the SD slot is useful for recovery */
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gd->tomtom.bootdev = BOOTDEV_MOVI;
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/* STRBDEV-2049 Reduce the drive strength on the MoviNand signals */
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__raw_writel(__raw_readl(CONTROL_PROG_IO1) & ~PRG_SDMMC1_SPEEDCTRL, CONTROL_PROG_IO1);
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mmc_init(BOOTDEV_MOVI);
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#ifdef BOOTDEV_SDCARD
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kernel_root_num = !mmc_init(BOOTDEV_SDCARD);
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if ((__raw_readl(0x480029c0) & 0xff) == 0x6) { /* Booted from the A1 SD slot? */
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gd->tomtom.bootdev = BOOTDEV_SDCARD;
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kernel_root_num = 0;
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}
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#endif
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/* Enable GPIO4 clocks FCLK and ICLK */
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__raw_writel(__raw_readl(CM_FCLKEN_WKUP) | (1 << CLKEN_PER_EN_GPIO2_BIT),
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CM_FCLKEN_WKUP);
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__raw_writel(__raw_readl(CM_ICLKEN_WKUP) | (1 << CLKEN_PER_EN_GPIO2_BIT),
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CM_ICLKEN_WKUP);
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delay(10000);
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#if !defined(__VARIANT_A1)
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if (!(__raw_readl(OMAP34XX_GPIO2_BASE + OMAP34XX_GPIO_DATAIN) & GPIO9)) {
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memcpy(DIAGSYS_ADDR_START, DIAGSYS_ADDR_NOR, DIAGSYS_LEN);
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memcpy(DEFAULT_FDT_START, DIAGSYS_ADDR_START+DIAGSYS_LEN-DEFAULT_FDT_LEN-512, DEFAULT_FDT_LEN);
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exec_applet=1;
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}
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#endif
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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#if defined(__VARIANT_A1)
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gd->bd->bi_arch_number = MACH_TYPE_STRASBOURG; /* Linux mach id */
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#else
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gd->bd->bi_arch_number = MACH_TYPE_STRASBOURG_A2; /* Linux mach id */
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#endif
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); /* boot param addr */
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return 0;
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}
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/**********************************************************
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* Routine: dss_init
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* Description: Initializes the display and fills the
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framebuffer with the logo.
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**********************************************************/
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void dss_init(void)
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{
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unsigned long i, y;
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unsigned long p = 0;
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unsigned char pixel[3];
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/* Draw logo into frame buffer */
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for (i = 0; i < header_data_rle_size; i++) {
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for (y = 0; y < header_data_rle[i][0]; y++) {
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HEADER_PIXEL(header_data_rle[i][1], pixel);
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*((unsigned int *)(FRAMEBUFFER_ADDR_START + p*4)) =
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(pixel[0] << 16) |
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(pixel[1] << 8) |
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(pixel[2]);
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p++;
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}
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}
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/* Reset lcd */
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if (omap_request_gpio(GPIO_nLCD_RESET)) {
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printf ("Error when requesting nLCD_RESET\n");
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return;
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}
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omap_set_gpio_dataout(GPIO_nLCD_RESET, 0);
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omap_set_gpio_direction(GPIO_nLCD_RESET, 0);
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/* Enable lcm power */
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if (omap_request_gpio(GPIO_LCM_PWR_ON)) {
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printf ("Error when requesting LCM_PWR_ON\n");
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return;
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}
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#if defined(__VARIANT_B2) || defined(__VARIANT_RENNES_A1) || defined(__VARIANT_RENNES_B1)
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if (omap_request_gpio(GPIO_SENSE_11V0)) {
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printf ("Error when requesting LCM_PWR_ON\n");
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return;
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}
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omap_set_gpio_direction(GPIO_SENSE_11V0, 1);
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omap_set_gpio_dataout(GPIO_LCM_PWR_ON, 0);
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omap_set_gpio_direction(GPIO_LCM_PWR_ON, 0);
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for (i = 0; i < SENSE_11V0_MAX_RETRY; i++) {
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/* attempt to activate LCD power supply */
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omap_set_gpio_dataout(GPIO_LCM_PWR_ON, 1);
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/* T8 */
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delay(600000); /* 2 ms */
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if (omap_get_gpio_datain(GPIO_SENSE_11V0))
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break;
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}
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if (i == SENSE_11V0_MAX_RETRY)
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printf("Failed to power on the LCM!!!");
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#else
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omap_set_gpio_dataout(GPIO_LCM_PWR_ON, 1);
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omap_set_gpio_direction(GPIO_LCM_PWR_ON, 0);
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#endif
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delay (9000000); /* 30 ms */
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/* Release Reset line */
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omap_set_gpio_dataout(GPIO_nLCD_RESET, 1);
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delay (9000000); /* 30 ms */
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/* Setup lcm */
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writel(0x00000001, 0x48050010);
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writel(0x00000000, 0x48050040);
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/* Enable RFBI set in bypass mode */
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writel(0x00000002, 0x48050840);
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writel(0x00310000, 0x48050860);
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/* Config display controller */
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writel(0x05F05F00, 0x48050464);
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writel(0x00a00a00, 0x48050468);
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writel(0x00000000, 0x4805046c);
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writel(0x00010006, 0x48050470);
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writel(0x000000ff, 0x48050474);
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writel(0x00000000, 0x48050478);
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writel(0x01DF031F, 0x4805047c);
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writel(FRAMEBUFFER_ADDR_START, 0x48050480);
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writel(0x01df031f, 0x4805048c);
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writel(0x000000b1, 0x480504a0);
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writel(0x03ff03c0, 0x480504a4);
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writel(0x08018309, 0x48050440);//DISPC_CONTROL enable disp
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}
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/**********************************************************
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* Routine: config_screen_rotation
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* Description: Configure the screen rotation based on the
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EEPROM setting
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**********************************************************/
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static void config_screen_rotation(void)
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{
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unsigned char fdt_rotation;
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/* Request the rotation GPIOs */
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if (omap_request_gpio(GPIO_LCD_UD)) {
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printf ("Error when requesting LCD_UD\n");
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return;
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}
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if (omap_request_gpio(GPIO_LCD_LR)) {
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printf ("Error when requesting LCD_LR\n");
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return;
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}
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/* Read the rotation value from EEPROM */
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select_bus(CFG_I2C_EEPROM_BUS, OMAP_I2C_FAST_MODE);
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if (eeprom_read (CFG_DEF_EEPROM_ADDR, FDT_SCR_ROT_OFFSET, &fdt_rotation, 1)) {
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printf("** Error reading screen rotation from EEPROM\n");
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fdt_rotation = 0;
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}
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select_bus(CFG_I2C_BUS, CFG_I2C_SPEED);
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/* Set the rotation GPIOs accordingly */
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if (fdt_rotation == '1') {
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omap_set_gpio_dataout(GPIO_LCD_UD, 0);
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omap_set_gpio_dataout(GPIO_LCD_LR, 1);
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}
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else {
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omap_set_gpio_dataout(GPIO_LCD_UD, 1);
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omap_set_gpio_dataout(GPIO_LCD_LR, 0);
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}
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omap_set_gpio_direction(GPIO_LCD_UD, 0);
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omap_set_gpio_direction(GPIO_LCD_LR, 0);
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}
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static unsigned char vcom_to_pwmaoff_rennes_b1(unsigned char vcom)
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{
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unsigned char pwmaoff;
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if (vcom >= 0x80)
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pwmaoff = 0x3f;
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else if (vcom == 0x7f)
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pwmaoff = 0x01;
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else if (vcom == 0x00)
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pwmaoff = 0x00;
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else
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pwmaoff = vcom + 1;
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return pwmaoff;
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}
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static void config_screen_vcom_rennes_b1(void)
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{
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unsigned char vcom, data;
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/* Read the vcom value from EEPROM */
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select_bus(CFG_I2C_EEPROM_BUS, OMAP_I2C_FAST_MODE);
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if (eeprom_read (CFG_DEF_EEPROM_ADDR, FDT_SCR_VCOM_OFFSET, &vcom, 1)) {
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printf("** Error reading screen VCOM from EEPROM\n");
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vcom = 0xff;
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}
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select_bus(CFG_I2C_BUS, CFG_I2C_SPEED);
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/* clear VIBRA_CTL[0] - VIBRA_EN */
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i2c_read(0x49, 0x45, 1, &data, 1);
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data &= ~1;
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i2c_write(0x49, 0x45, 1, &data, 1);
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/* set LEDEN[0] - LEDAON */
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i2c_read(0x4a, 0xee, 1, &data, 1);
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data |= 1;
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i2c_write(0x4a, 0xee, 1, &data, 1);
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/* set LEDEN[4] - LEDAPWM */
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i2c_read(0x4a, 0xee, 1, &data, 1);
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data |= (1 << 4);
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i2c_write(0x4a, 0xee, 1, &data, 1);
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/* clear LEDEN[2] - LEDAEXT */
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i2c_read(0x4a, 0xee, 1, &data, 1);
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data &= ~(1 << 2);
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i2c_write(0x4a, 0xee, 1, &data, 1);
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/* set PWMAON */
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data = 1;
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i2c_write(0x4a, 0xef, 1, &data, 1);
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/* set PWMAOFF */
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data = vcom_to_pwmaoff_rennes_b1(vcom);
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i2c_write(0x4a, 0xf0, 1, &data, 1);
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}
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static void switch_on_bl_pmic_pwm(void)
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{
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unsigned char data;
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/* PWM0ON */
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data = 0x2;
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i2c_write(0x4a, 0xF8, 1, &data, 1);
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/* PWM0OFF */
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data = 0x44;
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i2c_write(0x4a, 0xF9, 1, &data, 1);
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/* PMBR1 */
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i2c_read(0x49, 0x92, 1, &data, 1);
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data |= (1<<2);
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i2c_write(0x49, 0x92, 1, &data, 1);
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/* GPBR1 */
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i2c_read(0x49, 0x91, 1, &data, 1);
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data |= ((1<<2) | (1));
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i2c_write(0x49, 0x91, 1, &data, 1);
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/* Set GPIO13 (BL enable) output high*/
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data = 0x0;
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i2c_read(0x49, 0x9c, 1, &data, 1);
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data |= 0x20;
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i2c_write(0x49, 0x9c, 1, &data, 1);
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data = 0x0;
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i2c_read(0x49, 0x9f, 1, &data, 1);
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data |= 0x20;
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i2c_write(0x49, 0x9f, 1, &data, 1);
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}
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static void switch_on_bl_omap_pwm(void)
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{
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/* Configure GPT10 source (1: sys_clk, 0: 32K_clk) */
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sr32(CM_CLKSEL_CORE, 6, 1, 1);
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/* TSICR register: non-posted mode */
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writel(0x0, OMAP34XX_GPTIMER10_BASE + TSICR);
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/* Timer load register */
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writel(0xfffcd37e, OMAP34XX_GPTIMER10_BASE + TLDR);
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/* Trigger register */
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writel(0x0, OMAP34XX_GPTIMER10_BASE + TTGR);
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/* Match register */
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writel(0xfffdc5a7, OMAP34XX_GPTIMER10_BASE + TMAR);
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/* Timer counter register */
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writel(0xfffffffe, OMAP34XX_GPTIMER10_BASE + TCRR);
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/* Start the timer */
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writel(TIMER_CTRL_ST | TIMER_CTRL_AR | TIMER_CTRL_CE |
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TIMER_CTRL_PT | TIMER_CTRL_TRG_OVERFLOW_MATCH,
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OMAP34XX_GPTIMER10_BASE + TCLR);
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/* Enable the backlight */
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if (omap_request_gpio(GPIO_BACKLIGHT_ON)) {
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printf ("Error when requesting BACKLIGHT_ON gpio\n");
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return;
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}
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omap_set_gpio_dataout(GPIO_BACKLIGHT_ON, 1);
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omap_set_gpio_direction(GPIO_BACKLIGHT_ON, 0);
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}
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static void switch_on_bl_omap_pwm_rennes_b1(void)
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{
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unsigned char data;
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/*
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* switch off VDD_1V8_AUX2 so to hide the otherwise visible
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* white flash on reboot
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*/
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i2c_read(0x4b, 0x76, 1, &data, 1);
|
|
data &= ~0x20;
|
|
i2c_write(0x4b, 0x76, 1, &data, 1);
|
|
|
|
/* Configure the screen VCOM based on the EEPROM value */
|
|
config_screen_vcom_rennes_b1();
|
|
|
|
/* continue with the usual omap pwm configuration */
|
|
switch_on_bl_omap_pwm();
|
|
}
|
|
|
|
static struct mfd_feat bl_feats[] = {
|
|
MFD_1_0_A2(switch_on_bl_pmic_pwm),
|
|
MFD_1_0_B1(switch_on_bl_pmic_pwm),
|
|
MFD_1_0_B2(switch_on_bl_omap_pwm),
|
|
MFD_1_05(switch_on_bl_omap_pwm),
|
|
MFD_1_1(switch_on_bl_omap_pwm_rennes_b1),
|
|
MFD_2_0(switch_on_bl_omap_pwm_rennes_b1),
|
|
MFD_DEFAULT(NULL),
|
|
};
|
|
|
|
/**********************************************************
|
|
* Routine: switch_on_bl
|
|
* Description: Switches on the display backlight
|
|
**********************************************************/
|
|
static void switch_on_bl(void)
|
|
{
|
|
void (*switch_mfd_bl)(void) = mfd_feature(bl_feats);
|
|
|
|
/* Configure the screen rotation based on the EEPROM value */
|
|
config_screen_rotation();
|
|
|
|
if (switch_mfd_bl)
|
|
switch_mfd_bl();
|
|
|
|
/* Print out APTS tag */
|
|
printf ("\n[APTS Logo/]\n\n");
|
|
}
|
|
|
|
static void detect_sat_tuner_stuttgart_b1(void)
|
|
{
|
|
select_bus(CFG_I2C_EEPROM_BUS, OMAP_I2C_FAST_MODE);
|
|
if (eeprom_read(CFG_DEF_EEPROM_ADDR, EOL_SAT_TUN_OFFSET, &sat_tun, 1))
|
|
printf("** Error reading Diags_conf_13 Satellite Tuner\n");
|
|
select_bus(CFG_I2C_BUS, CFG_I2C_SPEED);
|
|
|
|
/* check bit 2 (SAT_CNF) */
|
|
sat_tun = (sat_tun != 0xff) && (sat_tun & 0x4);
|
|
}
|
|
|
|
static struct mfd_feat sat_tun_feats[] = {
|
|
MFD_2_0(detect_sat_tuner_stuttgart_b1),
|
|
MFD_DEFAULT(NULL),
|
|
};
|
|
|
|
/*******************************************************
|
|
* Routine: misc_init_r
|
|
* Description: Init ethernet (done here so udelay works)
|
|
********************************************************/
|
|
int misc_init_r(void)
|
|
{
|
|
void (*detect_mfd_sat_tun)(void) = mfd_feature(sat_tun_feats);
|
|
|
|
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
|
|
unsigned char data;
|
|
|
|
i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
|
|
|
|
twl4030_usb_init();
|
|
|
|
/* Disable the PMU watchdog. The main SoC watchdog
|
|
* is enabled by this time */
|
|
data = 0;
|
|
i2c_write(0x4b, 0x5e, 1, &data, 1);
|
|
#endif
|
|
|
|
if (detect_mfd_sat_tun)
|
|
detect_mfd_sat_tun();
|
|
|
|
switch_on_bl();
|
|
dieid_num_r();
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* IEN - Input Enable
|
|
* IDIS - Input Disable
|
|
* PTD - Pull type Down
|
|
* PTU - Pull type Up
|
|
* DIS - Pull type selection is inactive
|
|
* EN - Pull type selection is active
|
|
* M0 - Mode 0
|
|
* The commented string gives the final mux configuration for that pin
|
|
*/
|
|
#define MUX_DEFAULT_ES2()\
|
|
/*Die to Die */\
|
|
MUX_VAL(CP(d2d_mcad0), (IEN | PTD | EN | M0)) /*d2d_mcad0*/\
|
|
MUX_VAL(CP(d2d_mcad1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
|
|
MUX_VAL(CP(d2d_mcad2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
|
|
MUX_VAL(CP(d2d_mcad3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\
|
|
MUX_VAL(CP(d2d_mcad4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\
|
|
MUX_VAL(CP(d2d_mcad5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\
|
|
MUX_VAL(CP(d2d_mcad6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\
|
|
MUX_VAL(CP(d2d_mcad7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\
|
|
MUX_VAL(CP(d2d_mcad8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\
|
|
MUX_VAL(CP(d2d_mcad9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\
|
|
MUX_VAL(CP(d2d_mcad10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\
|
|
MUX_VAL(CP(d2d_mcad11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\
|
|
MUX_VAL(CP(d2d_mcad12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\
|
|
MUX_VAL(CP(d2d_mcad13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\
|
|
MUX_VAL(CP(d2d_mcad14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\
|
|
MUX_VAL(CP(d2d_mcad15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\
|
|
MUX_VAL(CP(d2d_mcad16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\
|
|
MUX_VAL(CP(d2d_mcad17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\
|
|
MUX_VAL(CP(d2d_mcad18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\
|
|
MUX_VAL(CP(d2d_mcad19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\
|
|
MUX_VAL(CP(d2d_mcad20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\
|
|
MUX_VAL(CP(d2d_mcad21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\
|
|
MUX_VAL(CP(d2d_mcad22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\
|
|
MUX_VAL(CP(d2d_mcad23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\
|
|
MUX_VAL(CP(d2d_mcad24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\
|
|
MUX_VAL(CP(d2d_mcad25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\
|
|
MUX_VAL(CP(d2d_mcad26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\
|
|
MUX_VAL(CP(d2d_mcad27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\
|
|
MUX_VAL(CP(d2d_mcad28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\
|
|
MUX_VAL(CP(d2d_mcad29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\
|
|
MUX_VAL(CP(d2d_mcad30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\
|
|
MUX_VAL(CP(d2d_mcad31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\
|
|
MUX_VAL(CP(d2d_mcad32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\
|
|
MUX_VAL(CP(d2d_mcad33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\
|
|
MUX_VAL(CP(d2d_mcad34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\
|
|
MUX_VAL(CP(d2d_mcad35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\
|
|
MUX_VAL(CP(d2d_mcad36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\
|
|
MUX_VAL(CP(d2d_clk26mi), (IEN | PTD | DIS | M0)) /*d2d_clk26mi */\
|
|
MUX_VAL(CP(d2d_nrespwron ), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\
|
|
MUX_VAL(CP(d2d_nreswarm), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\
|
|
MUX_VAL(CP(d2d_arm9nirq), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\
|
|
MUX_VAL(CP(d2d_uma2p6fiq ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
|
|
MUX_VAL(CP(d2d_spint), (IEN | PTD | EN | M0)) /*d2d_spint*/\
|
|
MUX_VAL(CP(d2d_frint), (IEN | PTD | EN | M0)) /*d2d_frint*/\
|
|
MUX_VAL(CP(d2d_dmareq0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0 */\
|
|
MUX_VAL(CP(d2d_dmareq1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1 */\
|
|
MUX_VAL(CP(d2d_dmareq2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2 */\
|
|
MUX_VAL(CP(d2d_dmareq3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3 */\
|
|
MUX_VAL(CP(d2d_n3gtrst), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst */\
|
|
MUX_VAL(CP(d2d_n3gtdi), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
|
|
MUX_VAL(CP(d2d_n3gtdo), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
|
|
MUX_VAL(CP(d2d_n3gtms), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
|
|
MUX_VAL(CP(d2d_n3gtck), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
|
|
MUX_VAL(CP(d2d_n3grtck), (IEN | PTD | DIS | M0)) /*d2d_n3grtck */\
|
|
MUX_VAL(CP(d2d_mstdby), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\
|
|
MUX_VAL(CP(d2d_swakeup), (IEN | PTD | EN | M0)) /*d2d_swakeup */\
|
|
MUX_VAL(CP(d2d_idlereq), (IEN | PTD | DIS | M0)) /*d2d_idlereq */\
|
|
MUX_VAL(CP(d2d_idleack), (IEN | PTU | EN | M0)) /*d2d_idleack */\
|
|
MUX_VAL(CP(d2d_mwrite), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
|
|
MUX_VAL(CP(d2d_swrite), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\
|
|
MUX_VAL(CP(d2d_mread), (IEN | PTD | DIS | M0)) /*d2d_mread*/\
|
|
MUX_VAL(CP(d2d_sread), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
|
|
MUX_VAL(CP(d2d_mbusflag), (IEN | PTD | DIS | M0)) /*d2d_mbusflag */\
|
|
MUX_VAL(CP(d2d_sbusflag), (IEN | PTD | DIS | M0)) /*d2d_sbusflag */\
|
|
MUX_VAL(CP(sdrc_cke0), (IDIS | PTU | EN | M0)) /*sdrc_cke0 */\
|
|
MUX_VAL(CP(sdrc_cke1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1 unused*/
|
|
|
|
/**********************************************************
|
|
* Routine: set_muxconf_regs
|
|
* Description: Setting up the configuration Mux registers
|
|
* specific to the hardware. Many pins need
|
|
* to be moved from protect to primary mode.
|
|
*********************************************************/
|
|
void set_muxconf_regs(void)
|
|
{
|
|
PADCONFIG_SETTINGS_UBOOT
|
|
PADCONFIG_SETTINGS_COMMON
|
|
MUX_DEFAULT_ES2();
|
|
}
|
|
|
|
/******************************************************************************
|
|
* Routine: update_mux()
|
|
* Description:Update balls which are different between boards. All should be
|
|
* updated to match functionality. However, I'm only updating ones
|
|
* which I'll be using for now. When power comes into play they
|
|
* all need updating.
|
|
*****************************************************************************/
|
|
void update_mux(u32 btype, u32 mtype)
|
|
{
|
|
/* NOTHING as of now... */
|
|
}
|
|
|
|
void board_env_init(void)
|
|
{
|
|
char ulong_str[16]; /* Needs to be as long as "0x12345678" + '\0' */
|
|
|
|
/* Replace with factory data when available */
|
|
switch(gd->bd->bi_arch_number) {
|
|
case MACH_TYPE_STRASBOURG_A2:
|
|
setenv("kernel.console", "ttyO2");
|
|
break;
|
|
case MACH_TYPE_STRASBOURG:
|
|
default:
|
|
setenv("kernel.console", "ttyO0");
|
|
break;
|
|
}
|
|
|
|
/* disable the console in case of satellite tuner */
|
|
if (sat_tun) {
|
|
printf("## Silent boot due to SAT_CNF\n\n");
|
|
setenv("kernel.console", "");
|
|
}
|
|
|
|
sprintf(ulong_str, "%u", kernel_root_num);
|
|
setenv("kernel.root.num", ulong_str);
|
|
|
|
sprintf(ulong_str, "%#lx", (unsigned long) DIAGSYS_ADDR_START);
|
|
setenv("applet.addr", ulong_str);
|
|
|
|
if (exec_applet) {
|
|
sprintf(ulong_str, "%u", DIAGSYS_LEN-44); /* 44 byte DSA sig at end */
|
|
setenv("applet.size", ulong_str);
|
|
|
|
sprintf(ulong_str, "%lx", DEFAULT_FDT_START);
|
|
setenv("fdt.default.addr", ulong_str);
|
|
|
|
setenv("exec_applet", "yes");
|
|
} else {
|
|
setenv("exec_applet", "no");
|
|
}
|
|
}
|