Wolfgang Denk b38dbd4622 Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
2006-03-13 00:46:05 +01:00
..
2005-07-25 14:05:07 -05:00
2005-07-25 14:05:07 -05:00
2005-10-13 16:45:02 +02:00
2005-07-25 15:38:06 -05:00
2004-08-01 23:02:45 +00:00