Jon Loeliger d14ba6a798 Handle 86xx SVR values according to the new Reference Manual. ...

Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.

Signed-off-by: Jon Loeliger <jdl@freescale.com>

2006-09-14 08:40:36 -05:00

..

cache.S

Remove L2 Cache invalidate polling.

2006-05-19 13:54:02 -05:00

config.mk

Review cleanups.

2006-05-31 14:01:32 -05:00

cpu_init.c

Remove trailing empty lines.

2006-08-29 11:05:09 -05:00

cpu.c

Handle 86xx SVR values according to the new Reference Manual.

2006-09-14 08:40:36 -05:00

i2c.c

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00

interrupts.c

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00

Makefile

Enable PCIE1 for MPC8641HPCN board

2006-06-27 09:17:59 -05:00

pci.c

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00

pcie_indirect.c

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00

resetvec.S

Initial support for MPC8641 HPCN board.

2006-04-26 17:58:56 -05:00

spd_sdram.c

Remove bogus msync and use volatile asm.

2006-08-29 09:48:49 -05:00

speed.c

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00

start.S

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00

traps.c

General indent and whitespace cleanups.

2006-08-22 12:06:18 -05:00