a2663ea4fc
- board/mpl/common/common_util.c
* implement support for BZIP2 compressed images
* various cleanups (printf -> puts, ...)
- board/mpl/common/flash.c
* report correct errors to upper layers
* check the erase fail and VPP low bits in status reg
- board/mpl/vcma9/cmd_vcma9.c
- board/mpl/vcma9/flash.c
* various cleanups (printf -> puts, ...)
- common/cmd_usb.c
* fix typo in comment
- cpu/arm920t/usb_ohci.c
* support for S3C2410 is missing in #if line
- drivers/cs8900.c
* reinit some registers in case of error (cable missing, ...)
- fs/fat/fat.c
* support for USB/MMC devices is missing in #if line
- include/configs/MIP405.h
- include/configs/PIP405.h
* enable BZIP2 support
* enlarge malloc space to 1MiB because of BZIP2 support
- include/configs/VCMA9.h
* enable BZIP2 support
* enlarge malloc space to 1MiB because of BZIP2 support
* enable USB support
- lib_arm/armlinux.c
* change calling convention of ARM Linux kernel as
described on http://www.arm.linux.org.uk/developer/booting.php
* Patch by Thomas Lange, 14 Nov 2003:
Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to
support all these AMD boards.
* Patch by Thomas Lange, 14 Nov 2003:
Workaround for mips au1x00 physical memory accesses (the au1x00
uses a 36 bit bus internally and cannot access physical memory
directly. Use the uncached SDRAM address instead of the physical
one.)
83 lines
2.5 KiB
C
83 lines
2.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996 by Ralf Baechle
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* Copyright (C) 2000 by Maciej W. Rozycki
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*
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* Defitions for the address spaces of the MIPS CPUs.
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*/
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#ifndef __ASM_MIPS_ADDRSPACE_H
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#define __ASM_MIPS_ADDRSPACE_H
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/*
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* Memory segments (32bit kernel mode addresses)
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*/
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#define KUSEG 0x00000000
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#define KSEG0 0x80000000
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#define KSEG1 0xa0000000
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#define KSEG2 0xc0000000
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#define KSEG3 0xe0000000
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#define K0BASE KSEG0
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/*
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* Returns the kernel segment base of a given address
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*/
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#ifndef __ASSEMBLY__
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#define KSEGX(a) (((unsigned long)(a)) & 0xe0000000)
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#else
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#define KSEGX(a) ((a) & 0xe0000000)
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#endif
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/*
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* Returns the physical address of a KSEG0/KSEG1 address
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*/
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#ifndef __ASSEMBLY__
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#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
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#else
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#define PHYSADDR(a) ((a) & 0x1fffffff)
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#endif
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/*
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* Returns the uncached address of a sdram address
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*/
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_AU1X00
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/* We use a 36 bit physical address map here and
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cannot access physical memory directly from core */
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#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
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#else /* !CONFIG_AU1X00 */
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#define UNCACHED_SDRAM(a) PHYSADDR(a)
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#endif /* CONFIG_AU1X00 */
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#endif /* __ASSEMBLY__ */
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/*
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* Map an address to a certain kernel segment
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*/
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#ifndef __ASSEMBLY__
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#define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
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#define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))
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#define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2))
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#define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3))
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#else
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#define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
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#define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
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#define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2)
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#define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3)
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#endif
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/*
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* Memory segments (64bit kernel mode addresses)
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*/
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#define XKUSEG 0x0000000000000000
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#define XKSSEG 0x4000000000000000
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#define XKPHYS 0x8000000000000000
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#define XKSEG 0xc000000000000000
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#define CKSEG0 0xffffffff80000000
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#define CKSEG1 0xffffffffa0000000
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#define CKSSEG 0xffffffffc0000000
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#define CKSEG3 0xffffffffe0000000
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#endif /* __ASM_MIPS_ADDRSPACE_H */
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