f889265753
The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values so it was not possible to set a slow pixel clock and thus prevented display on small screens. Signed-off-by: Kenneth Johansson <kenneth@southpole.se> Acked-by: John Rigby <jrigby@freescale.com>
To configure for the current (Rev 3.x) ADS5121 make ads5121_config This will automatically include PCI, the Real Time CLock, add backup flash ability and set the correct frequency and memory configuration. To configure for the older Rev 2 ADS5121 type (this will not have PCI) make ads5121_rev2_config