This patch updates the PLB/PCI divider when running at 400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch updates the PLB/PCI divider when running at 400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>