liliana/r-link-uboot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Add CompactFlash support for NSCU

Browse Source
This commit is contained in:
dzu 2003-10-19 21:43:26 +00:00
parent 3d1e8a9d4e
commit e7df029f1a
3 changed files with 58 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
CHANGELOG
View File

@ -2,6 +2,8 @@
Changes for U-Boot 1.0.0: Changes for U-Boot 1.0.0:
====================================================================== ======================================================================
* Add CompactFlash support for NSCU
* TRAB auto-update: Base decision if we have to strip the image * TRAB auto-update: Base decision if we have to strip the image
header on image type as encoded in the header header on image type as encoded in the header

58
common/cmd_pcmcia.c
View File

@ -160,7 +160,7 @@ int pcmcia_on (void)
} }
#else #else
#if defined(CONFIG_LWMON) #if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
# define CFG_PCMCIA_TIMING (PCMCIA_SHT(9) | PCMCIA_SST(3) | PCMCIA_SL(12)) # define CFG_PCMCIA_TIMING (PCMCIA_SHT(9) | PCMCIA_SST(3) | PCMCIA_SL(12))
#else #else
# define CFG_PCMCIA_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(4) | PCMCIA_SL(9)) # define CFG_PCMCIA_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(4) | PCMCIA_SL(9))
@ -594,8 +594,8 @@ static int hardware_enable(int slot)
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */ sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */ /* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_); pcmp->pcmc_pscr = PCMCIA_MASK(slot);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_); pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
/* /*
* Disable interrupts, DMA, and PCMCIA buffers * Disable interrupts, DMA, and PCMCIA buffers
@ -604,10 +604,13 @@ static int hardware_enable(int slot)
debug ("Disable PCMCIA buffers and assert RESET\n"); debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0; reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
#ifndef NSCU_OE_INV
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */ reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg; #endif
PCMCIA_PGCRX(slot) = reg;
udelay(500); udelay(500);
#ifndef CONFIG_NSCU
/* /*
* Configure Port C pins for * Configure Port C pins for
* 5 Volts Enable and 3 Volts enable * 5 Volts Enable and 3 Volts enable
@ -617,6 +620,7 @@ static int hardware_enable(int slot)
/* remove all power */ /* remove all power */
immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004); immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
#endif
/* /*
* Make sure there is a card in the slot, then configure the interface. * Make sure there is a card in the slot, then configure the interface.
@ -639,6 +643,7 @@ static int hardware_enable(int slot)
reg, reg,
(reg&PCMCIA_VS1(slot))?"n":"ff", (reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff"); (reg&PCMCIA_VS2(slot))?"n":"ff");
#ifndef CONFIG_NSCU
if ((reg & mask) == mask) { if ((reg & mask) == mask) {
immap->im_ioport.iop_pcdat |= 0x0004; immap->im_ioport.iop_pcdat |= 0x0004;
puts (" 5.0V card found: "); puts (" 5.0V card found: ");
@ -647,6 +652,13 @@ static int hardware_enable(int slot)
puts (" 3.3V card found: "); puts (" 3.3V card found: ");
} }
immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004); immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
#else
if ((reg & mask) == mask) {
puts (" 5.0V card found: ");
} else {
puts (" 3.3V card found: ");
}
#endif
#if 0 #if 0
/* VCC switch error flag, PCMCIA slot INPACK_ pin */ /* VCC switch error flag, PCMCIA slot INPACK_ pin */
cp->cp_pbdir &= ~(0x0020 | 0x0010); cp->cp_pbdir &= ~(0x0020 | 0x0010);
@ -655,10 +667,14 @@ static int hardware_enable(int slot)
#endif #endif
udelay(1000); udelay(1000);
debug ("Enable PCMCIA buffers and stop RESET\n"); debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_); reg = PCMCIA_PGCRX(slot);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */ reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
#ifndef NSCU_OE_INV
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */ reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg; #else
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
#endif
PCMCIA_PGCRX(slot) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */ udelay(250000); /* some cards need >150 ms to come up :-( */
@ -680,14 +696,18 @@ static int hardware_disable(int slot)
immap = (immap_t *)CFG_IMMR; immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
#ifndef CONFIG_NSCU
/* remove all power */ /* remove all power */
immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004); immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
#endif
debug ("Disable PCMCIA buffers and assert RESET\n"); debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0; reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
#ifndef NSCU_OE_INV
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */ reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg; #endif
PCMCIA_PGCRX(slot) = reg;
udelay(10000); udelay(10000);
@ -695,7 +715,12 @@ static int hardware_disable(int slot)
} }
#endif /* CFG_CMD_PCMCIA */ #endif /* CFG_CMD_PCMCIA */
#ifdef CONFIG_NSCU
static int voltage_set(int slot, int vcc, int vpp)
{
return 0;
}
#else
static int voltage_set(int slot, int vcc, int vpp) static int voltage_set(int slot, int vcc, int vpp)
{ {
volatile immap_t *immap; volatile immap_t *immap;
@ -714,10 +739,14 @@ static int voltage_set(int slot, int vcc, int vpp)
* and assert RESET signal * and assert RESET signal
*/ */
debug ("Disable PCMCIA buffers and assert RESET\n"); debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_); reg = PCMCIA_PGCRX(slot);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
#ifndef NSCU_OE_INV
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */ reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg; #else
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
#endif
PCMCIA_PGCRX(slot) = reg;
udelay(500); udelay(500);
/* /*
@ -755,16 +784,21 @@ static int voltage_set(int slot, int vcc, int vpp)
done: done:
debug ("Enable PCMCIA buffers and stop RESET\n"); debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_); reg = PCMCIA_PGCRX(slot);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */ reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
#ifndef NSCU_OE_INV
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */ reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg; #else
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
#endif
PCMCIA_PGCRX(slot) = reg;
udelay(500); udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n", debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A'); slot+'A');
return (0); return (0);
} }
#endif
#endif /* TQM8xxL */ #endif /* TQM8xxL */

12
include/configs/NSCU.h
View File

@ -35,6 +35,7 @@
#define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */
#define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */ #define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */
#define CONFIG_NSCU 1
#define CONFIG_8xx_CONS_SCC1 1 /* Console is on SMC1 */ #define CONFIG_8xx_CONS_SCC1 1 /* Console is on SMC1 */
@ -285,6 +286,9 @@
*----------------------------------------------------------------------- *-----------------------------------------------------------------------
* *
*/ */
/* NSCU use both slots, SLOT_A as "primary". */
#define CONFIG_PCMCIA_SLOT_A 1
#define CFG_PCMCIA_MEM_ADDR (0xE0000000) #define CFG_PCMCIA_MEM_ADDR (0xE0000000)
#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 ) #define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
#define CFG_PCMCIA_DMA_ADDR (0xE4000000) #define CFG_PCMCIA_DMA_ADDR (0xE4000000)
@ -293,6 +297,9 @@
#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 ) #define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
#define CFG_PCMCIA_IO_ADDR (0xEC000000) #define CFG_PCMCIA_IO_ADDR (0xEC000000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 ) #define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
#define PCMCIA_MEM_WIN_NO 8 /* override default 4 in pcmcia.h */
#define PCMCIA_SOCKETS_NO 2 /* we have two sockets */
#define NSCU_OE_INV 1 /* PCMCIA_GCRX_CXOE is inverted on early boards */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
@ -305,10 +312,11 @@
#undef CONFIG_IDE_LED /* LED for ide not supported */ #undef CONFIG_IDE_LED /* LED for ide not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */ #undef CONFIG_IDE_RESET /* reset for ide not supported */
#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ #define CFG_IDE_MAXBUS 2 /* max. 2 IDE buses */
#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ #define CFG_IDE_MAXDEVICE 4 /* max. 2 drives per IDE bus */
#define CFG_ATA_IDE0_OFFSET 0x0000 #define CFG_ATA_IDE0_OFFSET 0x0000
#define CFG_ATA_IDE1_OFFSET (4 * CFG_PCMCIA_MEM_SIZE) /* starts @ 4th window */
#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR #define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR