u-boot: update version /home/liliana/Dingussy/local/releases/tt2094591
This commit is contained in:
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6024743d64
commit
53c8b0c707
@ -93,10 +93,10 @@
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/* The following settings are there to overcome TS problem */ \
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/* The following settings are there to overcome TS problem */ \
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\
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\
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/* UART1 lines */ \
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/* UART1 lines */ \
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PC_DEFINE(CP(UART1_CTS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_CTS), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_OUTPUT | PC_PULL_DIS | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_RX), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_RX_SOC_TX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_RX_SOC_TX */ \
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\
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\
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/* UART2 lines */ \
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/* UART2 lines */ \
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PC_DEFINE(CP(MCBSP3_CLKX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* BT_RX */ \
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PC_DEFINE(CP(MCBSP3_CLKX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* BT_RX */ \
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@ -110,7 +110,7 @@
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* nBT_RST */ \
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* nBT_RST */ \
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PC_DEFINE(CP(CAM_XCLKA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(CAM_XCLKA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* nCAM_RST */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* nCAM_RST */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* nGPS2_RESET */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4 | PC_OFF_IN_PULLDOWN) /* nGPS_RESET */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_HOST_REQ */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_HOST_REQ */ \
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\
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\
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/* MCBSP1 lines */ \
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/* MCBSP1 lines */ \
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@ -161,8 +161,8 @@
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#define PADCONFIG_SETTINGS_KERNEL_RENNES_B1 \
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#define PADCONFIG_SETTINGS_KERNEL_RENNES_B1 \
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/* UART1 lines */ \
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/* UART1 lines */ \
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PC_DEFINE(CP(UART1_CTS), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_CTS), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RX), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_RX), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_RX_SOC_TX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_RX_SOC_TX */ \
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\
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\
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@ -233,7 +233,7 @@
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PC_DEFINE(CP(CAM_XCLKA), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(CAM_XCLKA), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nCAM_RST */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nCAM_RST */ \
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nBT_RST */ \
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nBT_RST */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nGPS_RESET */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nGPS_RESET */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* GPS_HOST_REQ */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* GPS_HOST_REQ */ \
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PC_DEFINE(CP(GPIO126), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nAUTH_RST */ \
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PC_DEFINE(CP(GPIO126), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nAUTH_RST */ \
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PC_DEFINE(CP(GPIO129), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_ON */ \
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PC_DEFINE(CP(GPIO129), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_ON */ \
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@ -300,8 +300,8 @@
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PC_DEFINE(CP(I2C2_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C2_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SCL), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SCL), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C4_SCL), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE7) \
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PC_DEFINE(CP(I2C4_SCL), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C4_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE7) \
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PC_DEFINE(CP(I2C4_SDA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SCL), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SCL), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SDA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SDA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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\
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\
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@ -93,10 +93,10 @@
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/* The following settings are there to overcome TS problem */ \
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/* The following settings are there to overcome TS problem */ \
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\
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\
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/* UART1 lines */ \
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/* UART1 lines */ \
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PC_DEFINE(CP(UART1_CTS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_CTS), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_OUTPUT | PC_PULL_DIS | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_RX), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_RX_SOC_TX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_RX_SOC_TX */ \
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\
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\
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/* UART2 lines */ \
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/* UART2 lines */ \
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PC_DEFINE(CP(MCBSP3_CLKX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* BT_RX */ \
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PC_DEFINE(CP(MCBSP3_CLKX), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* BT_RX */ \
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@ -110,7 +110,7 @@
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* nBT_RST */ \
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* nBT_RST */ \
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PC_DEFINE(CP(CAM_XCLKA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(CAM_XCLKA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* nCAM_RST */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE4) /* nCAM_RST */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* nGPS2_RESET */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4 | PC_OFF_IN_PULLDOWN) /* nGPS_RESET */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_HOST_REQ */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4) /* GPS_HOST_REQ */ \
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\
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\
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/* MCBSP1 lines */ \
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/* MCBSP1 lines */ \
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@ -161,8 +161,8 @@
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#define PADCONFIG_SETTINGS_KERNEL_STUTTGART_B1 \
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#define PADCONFIG_SETTINGS_KERNEL_STUTTGART_B1 \
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/* UART1 lines */ \
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/* UART1 lines */ \
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PC_DEFINE(CP(UART1_CTS), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_CTS), PC_INPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_IN_PULLDOWN) /* GPS_RTS_SOC_CTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RTS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_CTS_SOC_RTS */ \
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PC_DEFINE(CP(UART1_RX), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_RX), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_TX_SOC_RX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_RX_SOC_TX */ \
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PC_DEFINE(CP(UART1_TX), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0 | PC_OFF_OUT_LOW) /* GPS_RX_SOC_TX */ \
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\
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\
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@ -233,7 +233,7 @@
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PC_DEFINE(CP(CAM_XCLKA), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(CAM_XCLKA), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_PWR_ON */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nCAM_RST */ \
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PC_DEFINE(CP(SDMMC2_DAT1), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nCAM_RST */ \
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nBT_RST */ \
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PC_DEFINE(CP(GPMC_NBE0_CLE), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nBT_RST */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nGPS_RESET */ \
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PC_DEFINE(CP(MCBSP_CLKS), PC_OUTPUT | PC_PULL_ENA | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nGPS_RESET */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* GPS_HOST_REQ */ \
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PC_DEFINE(CP(UART3_RTS_SD), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* GPS_HOST_REQ */ \
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PC_DEFINE(CP(GPIO126), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nAUTH_RST */ \
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PC_DEFINE(CP(GPIO126), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* nAUTH_RST */ \
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PC_DEFINE(CP(GPIO129), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_ON */ \
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PC_DEFINE(CP(GPIO129), PC_OUTPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE4 | PC_OFF_OUT_LOW) /* CAM_ON */ \
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@ -300,8 +300,8 @@
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PC_DEFINE(CP(I2C2_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C2_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SCL), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SCL), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C3_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE0) \
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PC_DEFINE(CP(I2C4_SCL), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE7) \
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PC_DEFINE(CP(I2C4_SCL), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C4_SDA), PC_INPUT | PC_PULL_DIS | PC_PULL_DOWN | PC_MODE7) \
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PC_DEFINE(CP(I2C4_SDA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SCL), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SCL), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SDA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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PC_DEFINE(CP(I2C1_SDA), PC_INPUT | PC_PULL_ENA | PC_PULL_UP | PC_MODE0) \
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\
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\
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