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Prepare for SoC rework of ARM code:

Browse Source 
- rename CONFIG_BOOTBINFUNC into  CONFIG_INIT_CRITICAL
- rename memsetup into lowlevel_init (function name and source files)
This commit is contained in:
wdenk 2005-04-02 23:52:25 +00:00
parent 414eec35e3
commit 400558b561
115 changed files with 208 additions and 210 deletions
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4
CHANGELOG
View File

@ -2,6 +2,10 @@
Changes for U-Boot 1.1.3: Changes for U-Boot 1.1.3:
====================================================================== ======================================================================
* Prepare for SoC rework of ARM code:
- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL
- rename memsetup into lowlevel_init (function name and source files)
* Fix problems with SNTP support; * Fix problems with SNTP support;
enable SNTP support in some boards. enable SNTP support in some boards.

9
README
View File

@ -2128,6 +2128,15 @@ Low Level (hardware related) configuration options:
This only takes effect if the memory commands are activated This only takes effect if the memory commands are activated
globally (CFG_CMD_MEM). globally (CFG_CMD_MEM).
- CONFIG_INIT_CRITICAL
[ARM only] If this variable is NOT defined, then
certain critical initializations (like setting up the
memory controller) are omitted. Normally this
variable MUST be defined for all boards. The only
exception is when U-Boot is loaded (to RAM) by some
other boot loader or by a debugger which performs
these intializations itself.
Building the Software: Building the Software:
====================== ======================

4
board/assabet/setup.S
View File

@ -80,8 +80,8 @@ BCR_DB1110: .long ASSABET_BCR_DB1110
LEDS: .long NEPONSET_LEDS LEDS: .long NEPONSET_LEDS
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* Setting up the memory and stuff */ /* Setting up the memory and stuff */

2
board/cerf250/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := cerf250.o flash.o OBJS := cerf250.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

10
board/cerf250/memsetup.S → board/cerf250/lowlevel_init.S
View File

@ -3,7 +3,7 @@
* *
* NOTE: I haven't clean this up considerably, just enough to get it * NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See * running. See hal_platform_setup.h for the source. See
* board/cradle/memsetup.S for another PXA250 setup that is * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner. * much cleaner.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
* Memory setup * Memory setup
*/ */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* Set up GPIO pins first ----------------------------------------- */ /* Set up GPIO pins first ----------------------------------------- */
@ -403,9 +403,9 @@ initclks:
#endif #endif
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* End memsetup */ /* End lowlevel_init */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
endmemsetup: endlowlevel_init:
mov pc, lr mov pc, lr

2
board/cradle/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := cradle.o flash.o OBJS := cradle.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

6
board/cradle/memsetup.S → board/cradle/lowlevel_init.S
View File

@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
.endm .endm
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -512,4 +512,4 @@ mem_init:
mov pc, r10 mov pc, r10
@ End memsetup @ End lowlevel_init

2
board/csb226/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := csb226.o flash.o OBJS := csb226.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

10
board/logodl/memsetup.S → board/csb226/lowlevel_init.S
View File

@ -3,7 +3,7 @@
* *
* NOTE: I haven't clean this up considerably, just enough to get it * NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See * running. See hal_platform_setup.h for the source. See
* board/cradle/memsetup.S for another PXA250 setup that is * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner. * much cleaner.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -46,8 +46,8 @@ _TEXT_BASE:
* Memory setup * Memory setup
*/ */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -429,9 +429,9 @@ initclks:
#endif #endif
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* End memsetup */ /* End lowlevel_init */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
endmemsetup: endlowlevel_init:
mov pc, lr mov pc, lr

2
board/dave/B2/Makefile
View File

@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := B2.o flash.o OBJS := B2.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/dave/B2/memsetup.S → board/dave/B2/lowlevel_init.S
View File

@ -149,8 +149,8 @@ MEMORY_CONFIG:
.word 0x20 /*MRSR7*/ .word 0x20 /*MRSR7*/
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* /*
the next instruction fail due memory relocation... the next instruction fail due memory relocation...

2
board/dbau1x00/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o OBJS = $(BOARD).o flash.o
SOBJS = memsetup.o SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS) $(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/dbau1x00/memsetup.S → board/dbau1x00/lowlevel_init.S
View File

@ -16,8 +16,8 @@
.set noreorder .set noreorder
.set mips32 .set mips32
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* /*
* Step 1) Establish CPU endian mode. * Step 1) Establish CPU endian mode.
* Db1500-specific: * Db1500-specific:

2
board/dnp1110/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := dnp1110.o flash.o OBJS := dnp1110.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/dnp1110/memsetup.S → board/dnp1110/lowlevel_init.S
View File

@ -63,8 +63,8 @@ smcnfg: .long 0x00000000
/* setting up the memory */ /* setting up the memory */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
ldr r0, MEM_BASE ldr r0, MEM_BASE

2
board/ep7312/Makefile
View File

@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := ep7312.o flash.o OBJS := ep7312.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/ep7312/memsetup.S → board/ep7312/lowlevel_init.S
View File

@ -45,8 +45,8 @@ sdrfpr_val: .long 0x00000240
sdconf_val: .long 0x00000522 sdconf_val: .long 0x00000522
/* setting up the memory */ /* setting up the memory */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* /*
* SYSCON1-3 * SYSCON1-3
*/ */

2
board/evb4510/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := evb4510.o flash.o OBJS := evb4510.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^ $(AR) crv $@ $^

6
board/evb4510/memsetup.S → board/evb4510/lowlevel_init.S
View File

@ -31,7 +31,7 @@
* *
* This memory map allows us to relocate from FLASH to SRAM. After * This memory map allows us to relocate from FLASH to SRAM. After
* power-on reset the CPU only knows about the FLASH memory at address * power-on reset the CPU only knows about the FLASH memory at address
* 0x00000000. After memsetup completes the memory map will be: * 0x00000000. After lowlevel_init completes the memory map will be:
* *
* Memory Addr * Memory Addr
* 0x00000000 * 0x00000000
@ -54,8 +54,8 @@
* *
***********************************************************************/ ***********************************************************************/
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* preserve the temp register (r12 AKA ip) and remap it. */ /* preserve the temp register (r12 AKA ip) and remap it. */
ldr r1, =SRAM_BASE+0xC ldr r1, =SRAM_BASE+0xC

2
board/gcplus/Makefile
View File

@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := gcplus.o flash.o OBJS := gcplus.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

6
board/gcplus/memsetup.S → board/gcplus/lowlevel_init.S
View File

@ -29,11 +29,11 @@
#include "version.h" #include "version.h"
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us. /* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us.
* However the darn thing leaves the MMU enabled before handing control * However the darn thing leaves the MMU enabled before handing control
* over to us. So we need to disable the MMU and we use memsetup * over to us. So we need to disable the MMU and we use lowlevel_init
* to do it. * to do it.
*/ */

2
board/impa7/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := impa7.o flash.o OBJS := impa7.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/impa7/memsetup.S → board/impa7/lowlevel_init.S
View File

@ -39,8 +39,8 @@ memcfg2_val: .long 0x00000000 @ upper 16 bits are reserved for CS7 + CS6
drfpr_val: .long 0x00000081 drfpr_val: .long 0x00000081
/* setting up the memory */ /* setting up the memory */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* /*
* DRFPR * DRFPR
* 64kHz DRAM refresh * 64kHz DRAM refresh

2
board/incaip/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o OBJS = $(BOARD).o flash.o
SOBJS = memsetup.o SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS) $(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

8
board/incaip/memsetup.S → board/incaip/lowlevel_init.S
View File

@ -269,9 +269,9 @@ sdram_init:
.end sdram_init .end sdram_init
.globl memsetup .globl lowlevel_init
.ent memsetup .ent lowlevel_init
memsetup: lowlevel_init:
/* EBU, CGU and SDRAM Initialization. /* EBU, CGU and SDRAM Initialization.
*/ */
@ -292,4 +292,4 @@ memsetup:
j ra j ra
nop nop
.end memsetup .end lowlevel_init

2
board/innokom/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := innokom.o flash.o OBJS := innokom.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

10
board/csb226/memsetup.S → board/innokom/lowlevel_init.S
View File

@ -3,7 +3,7 @@
* *
* NOTE: I haven't clean this up considerably, just enough to get it * NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See * running. See hal_platform_setup.h for the source. See
* board/cradle/memsetup.S for another PXA250 setup that is * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner. * much cleaner.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -46,8 +46,8 @@ _TEXT_BASE:
* Memory setup * Memory setup
*/ */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -429,9 +429,9 @@ initclks:
#endif #endif
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* End memsetup */ /* End lowlevel_init */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
endmemsetup: endlowlevel_init:
mov pc, lr mov pc, lr

2
board/lart/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := lart.o flash.o OBJS := lart.o flash.o
SOBJS := flashasm.o memsetup.o SOBJS := flashasm.o lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/lart/memsetup.S → board/lart/lowlevel_init.S
View File

@ -53,8 +53,8 @@ mecr: .long 0x00060006
/* setting up the memory */ /* setting up the memory */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
ldr r0, MEM_BASE ldr r0, MEM_BASE
/* Setup the flash memory */ /* Setup the flash memory */

2
board/logodl/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := logodl.o flash.o OBJS := logodl.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^ $(AR) crv $@ $^

10
board/innokom/memsetup.S → board/logodl/lowlevel_init.S
View File

@ -3,7 +3,7 @@
* *
* NOTE: I haven't clean this up considerably, just enough to get it * NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See * running. See hal_platform_setup.h for the source. See
* board/cradle/memsetup.S for another PXA250 setup that is * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner. * much cleaner.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -46,8 +46,8 @@ _TEXT_BASE:
* Memory setup * Memory setup
*/ */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -429,9 +429,9 @@ initclks:
#endif #endif
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* End memsetup */ /* End lowlevel_init */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
endmemsetup: endlowlevel_init:
mov pc, lr mov pc, lr

2
board/lpd7a40x/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := lpd7a40x.o flash.o OBJS := lpd7a40x.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/lpd7a40x/memsetup.S → board/lpd7a40x/lowlevel_init.S
View File

@ -131,8 +131,8 @@
_TEXT_BASE: _TEXT_BASE:
.word TEXT_BASE .word TEXT_BASE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r9, lr @ save return address mov r9, lr @ save return address
/* memory control configuration */ /* memory control configuration */

2
board/lubbock/Makefile
View File

@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := lubbock.o flash.o OBJS := lubbock.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

10
board/lubbock/memsetup.S → board/lubbock/lowlevel_init.S
View File

@ -3,7 +3,7 @@
* *
* NOTE: I haven't clean this up considerably, just enough to get it * NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See * running. See hal_platform_setup.h for the source. See
* board/cradle/memsetup.S for another PXA250 setup that is * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner. * much cleaner.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
* Memory setup * Memory setup
*/ */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -403,9 +403,9 @@ initclks:
#endif #endif
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* End memsetup */ /* End lowlevel_init */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
endmemsetup: endlowlevel_init:
mov pc, lr mov pc, lr

2
board/modnet50/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := modnet50.o flash.o OBJS := modnet50.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^ $(AR) crv $@ $^

6
board/modnet50/memsetup.S → board/modnet50/lowlevel_init.S
View File

@ -51,8 +51,8 @@
#define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1)) #define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1))
/* setting up the memory */ /* setting up the memory */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
#if defined(CONFIG_MODNET50) #if defined(CONFIG_MODNET50)
ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE) ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE)
@ -187,7 +187,7 @@ memsetup_cs3:
#endif /* CONFIG_MODNET50 */ #endif /* CONFIG_MODNET50 */
memsetup_end: lowlevel_init_end:
/* /*
* manipulate address in lr and ip to match new * manipulate address in lr and ip to match new
* address space * address space

2
board/mpl/vcma9/Makefile
View File

@ -28,7 +28,7 @@ LIB = lib$(BOARD).a
OBJS := vcma9.o flash.o cmd_vcma9.o OBJS := vcma9.o flash.o cmd_vcma9.o
OBJS += ../common/common_util.o ../common/memtst.o OBJS += ../common/common_util.o ../common/memtst.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/mpl/vcma9/memsetup.S → board/mpl/vcma9/lowlevel_init.S
View File

@ -130,8 +130,8 @@
_TEXT_BASE: _TEXT_BASE:
.word TEXT_BASE .word TEXT_BASE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* memory control configuration */ /* memory control configuration */
/* make r0 relative the current location so that it */ /* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */ /* reads SMRDATA out of FLASH rather than memory ! */

2
board/mx1ads/Makefile
View File

@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := mx1ads.o syncflash.o OBJS := mx1ads.o syncflash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

6
board/mx1ads/memsetup.S → board/mx1ads/lowlevel_init.S
View File

@ -1,5 +1,5 @@
/* /*
* board/mx1ads/memsetup.S * board/mx1ads/lowlevel_init.S
* *
* (c) Copyright 2004 * (c) Copyright 2004
* Techware Information Technology, Inc. * Techware Information Technology, Inc.
@ -33,8 +33,8 @@
_TEXT_BASE: _TEXT_BASE:
.word TEXT_BASE .word TEXT_BASE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* memory controller init */ /* memory controller init */
ldr r1, =SDCTL0 ldr r1, =SDCTL0

2
board/mx1fs2/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := mx1fs2.o flash.o OBJS := mx1fs2.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^ $(AR) crv $@ $^

4
board/mx1fs2/memsetup.S → board/mx1fs2/lowlevel_init.S
View File

@ -22,8 +22,8 @@
#include <version.h> #include <version.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr

2
board/pleb2/Makefile
View File

@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := pleb2.o flash.o OBJS := pleb2.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

6
board/pleb2/memsetup.S → board/pleb2/lowlevel_init.S
View File

@ -33,8 +33,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
sub pc,pc,#4 sub pc,pc,#4
.endm .endm
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -485,4 +485,4 @@ mem_init:
mov pc, r10 mov pc, r10
@ End memsetup @ End lowlevel_init

2
board/purple/Makefile
View File

@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o sconsole.o OBJS = $(BOARD).o flash.o sconsole.o
SOBJS = memsetup.o SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS) $(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(AR) crv $@ $(OBJS)

4
board/purple/memsetup.S → board/purple/lowlevel_init.S
View File

@ -28,8 +28,8 @@
#define MC_IOGP 0xBF800800 #define MC_IOGP 0xBF800800
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
li t0, MC_IOGP li t0, MC_IOGP
li t1, 0xf24 li t1, 0xf24
sw t1, 0(t0) sw t1, 0(t0)

2
board/purple/u-boot.lds
View File

@ -35,7 +35,7 @@ SECTIONS
.text : .text :
{ {
cpu/mips/start.o (.text) cpu/mips/start.o (.text)
board/purple/memsetup.o (.text) board/purple/lowlevel_init.o (.text)
cpu/mips/cache.o (.text) cpu/mips/cache.o (.text)
common/main.o (.text) common/main.o (.text)
common/dlmalloc.o (.text) common/dlmalloc.o (.text)

2
board/scb9328/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := scb9328.o flash.o OBJS := scb9328.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^ $(AR) crv $@ $^

4
board/scb9328/memsetup.S → board/scb9328/lowlevel_init.S
View File

@ -22,8 +22,8 @@
#include <version.h> #include <version.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr

2
board/shannon/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := shannon.o flash.o OBJS := shannon.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/shannon/memsetup.S → board/shannon/lowlevel_init.S
View File

@ -51,8 +51,8 @@ mecr: .long 0x7fff7fff @ 01000000
/* setting up the memory */ /* setting up the memory */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
ldr r0, MEM_BASE ldr r0, MEM_BASE
/* Setup the flash memory */ /* Setup the flash memory */

2
board/smdk2400/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := smdk2400.o flash.o OBJS := smdk2400.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/smdk2400/memsetup.S → board/smdk2400/lowlevel_init.S
View File

@ -125,8 +125,8 @@
_TEXT_BASE: _TEXT_BASE:
.word TEXT_BASE .word TEXT_BASE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* memory control configuration */ /* memory control configuration */
/* make r0 relative the current location so that it */ /* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */ /* reads SMRDATA out of FLASH rather than memory ! */

2
board/smdk2410/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := smdk2410.o flash.o OBJS := smdk2410.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/smdk2410/memsetup.S → board/smdk2410/lowlevel_init.S
View File

@ -129,8 +129,8 @@
_TEXT_BASE: _TEXT_BASE:
.word TEXT_BASE .word TEXT_BASE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* memory control configuration */ /* memory control configuration */
/* make r0 relative the current location so that it */ /* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */ /* reads SMRDATA out of FLASH rather than memory ! */

2
board/tb0229/Makefile
View File

@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o vr4131-pci.o OBJS = $(BOARD).o flash.o vr4131-pci.o
SOBJS = memsetup.o SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS) $(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/tb0229/memsetup.S → board/tb0229/lowlevel_init.S
View File

@ -14,8 +14,8 @@
#include <asm/regdef.h> #include <asm/regdef.h>
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* BCUCNTREG1 = 0x0040 */ /* BCUCNTREG1 = 0x0040 */
la t0, 0xaf000000 la t0, 0xaf000000

2
board/trab/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`) gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)

4
board/trab/memsetup.S → board/trab/lowlevel_init.S
View File

@ -140,8 +140,8 @@
_TEXT_BASE: _TEXT_BASE:
.word TEXT_BASE .word TEXT_BASE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
/* memory control configuration */ /* memory control configuration */
/* make r0 relative the current location so that it */ /* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */ /* reads SMRDATA out of FLASH rather than memory ! */

2
board/wepep250/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := wepep250.o flash.o OBJS := wepep250.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/wepep250/memsetup.S → board/wepep250/lowlevel_init.S
View File

@ -35,8 +35,8 @@
#include <version.h> #include <version.h>
#include <asm/arch/pxa-regs.h> #include <asm/arch/pxa-regs.h>
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr

2
board/xaeniax/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := xaeniax.o flash.o OBJS := xaeniax.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

10
board/xaeniax/memsetup.S → board/xaeniax/lowlevel_init.S
View File

@ -3,7 +3,7 @@
* *
* NOTE: I haven't clean this up considerably, just enough to get it * NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See * running. See hal_platform_setup.h for the source. See
* board/cradle/memsetup.S for another PXA250 setup that is * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner. * much cleaner.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -39,8 +39,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
.endm .endm
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -416,9 +416,9 @@ test:
#endif #endif
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* End memsetup */ /* End lowlevel_init */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
endmemsetup: endlowlevel_init:
mov pc, lr mov pc, lr

2
board/xm250/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := xm250.o flash.o OBJS := xm250.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^ $(AR) crv $@ $^

6
board/xm250/memsetup.S → board/xm250/lowlevel_init.S
View File

@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
.endm .endm
*/ */
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr
@ -516,4 +516,4 @@ mem_init:
mov pc, r10 mov pc, r10
@ End memsetup @ End lowlevel_init

2
board/xsengine/Makefile
View File

@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := xsengine.o flash.o OBJS := xsengine.o flash.o
SOBJS := memsetup.o SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS) $(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS)

4
board/xsengine/memsetup.S → board/xsengine/lowlevel_init.S
View File

@ -4,8 +4,8 @@
DRAM_SIZE: .long CFG_DRAM_SIZE DRAM_SIZE: .long CFG_DRAM_SIZE
.globl memsetup .globl lowlevel_init
memsetup: lowlevel_init:
mov r10, lr mov r10, lr

4
cpu/arm720t/start.S
View File

@ -316,10 +316,10 @@ cpu_init_crit:
/* /*
* before relocating, we have to setup RAM timing * before relocating, we have to setup RAM timing
* because memory timing is board-dependent, you will * because memory timing is board-dependent, you will
* find a memsetup.S in your board directory. * find a lowlevel_init.S in your board directory.
*/ */
mov ip, lr mov ip, lr
bl memsetup bl lowlevel_init
mov lr, ip mov lr, ip
mov pc, lr mov pc, lr

4
cpu/arm920t/start.S
View File

@ -257,10 +257,10 @@ cpu_init_crit:
/* /*
* before relocating, we have to setup RAM timing * before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will * because memory timing is board-dependend, you will
* find a memsetup.S in your board directory. * find a lowlevel_init.S in your board directory.
*/ */
mov ip, lr mov ip, lr
bl memsetup bl lowlevel_init
mov lr, ip mov lr, ip
mov pc, lr mov pc, lr

4
cpu/at91rm9200/lowlevel.S
View File

@ -30,7 +30,7 @@
#include <config.h> #include <config.h>
#include <version.h> #include <version.h>
#ifdef CONFIG_BOOTBINFUNC #ifdef CONFIG_INIT_CRITICAL
/* /*
* some parameters for the board * some parameters for the board
* *
@ -197,4 +197,4 @@ SMRDATA1:
.word SDRAM .word SDRAM
.word SDRAM_VAL .word SDRAM_VAL
/* SMRDATA1 is 176 bytes long */ /* SMRDATA1 is 176 bytes long */
#endif /* CONFIG_BOOTBINFUNC */ #endif /* CONFIG_INIT_CRITICAL */

8
cpu/at91rm9200/start.S
View File

@ -115,7 +115,7 @@ reset:
orr r0,r0,#0xd3 /* was 13 */ orr r0,r0,#0xd3 /* was 13 */
msr cpsr,r0 msr cpsr,r0
#ifdef CONFIG_BOOTBINFUNC #ifdef CONFIG_INIT_CRITICAL
/* scratch stack */ /* scratch stack */
ldr r1, =0x00204000 ldr r1, =0x00204000
/* Insure word alignment */ /* Insure word alignment */
@ -141,7 +141,7 @@ reset:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
orr r0, r0, #0xC0000000 @ set bits 31:30 (iA, nF) orr r0, r0, #0xC0000000 @ set bits 31:30 (iA, nF)
mcr p15, 0, r0, c1, c0, 0 @ write r0 in cp15 control register (cp15 r1) mcr p15, 0, r0, c1, c0, 0 @ write r0 in cp15 control register (cp15 r1)
#endif /* CONFIG_BOOTBINFUNC */ #endif /* CONFIG_INIT_CRITICAL */
/* /*
* relocate exeception table * relocate exeception table
*/ */
@ -160,9 +160,7 @@ copyex:
*/ */
#ifdef CONFIG_INIT_CRITICAL #ifdef CONFIG_INIT_CRITICAL
bl cpu_init_crit bl cpu_init_crit
#endif
#ifdef CONFIG_BOOTBINFUNC
relocate: /* relocate U-Boot to RAM */ relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */ adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
@ -179,7 +177,7 @@ copy_loop:
stmia r1!, {r3-r10} /* copy to target address [r1] */ stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */ cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop ble copy_loop
#endif /* CONFIG_BOOTBINFUNC */ #endif /* CONFIG_INIT_CRITICAL */
/* Set up the stack */ /* Set up the stack */
stack_setup: stack_setup:

4
cpu/lh7a40x/start.S
View File

@ -229,10 +229,10 @@ cpu_init_crit:
/* /*
* before relocating, we have to setup RAM timing * before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will * because memory timing is board-dependend, you will
* find a memsetup.S in your board directory. * find a lowlevel_init.S in your board directory.
*/ */
mov ip, lr mov ip, lr
bl memsetup bl lowlevel_init
mov lr, ip mov lr, ip
mov pc, lr mov pc, lr

2
cpu/mips/start.S
View File

@ -243,7 +243,7 @@ reset:
/* Initialize any external memory. /* Initialize any external memory.
*/ */
bal memsetup bal lowlevel_init
nop nop
/* Initialize caches... /* Initialize caches...

4
cpu/pxa/start.S
View File

@ -218,10 +218,10 @@ setspeed_done:
/* /*
* before relocating, we have to setup RAM timing * before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will * because memory timing is board-dependend, you will
* find a memsetup.S in your board directory. * find a lowlevel_init.S in your board directory.
*/ */
mov ip, lr mov ip, lr
bl memsetup bl lowlevel_init
mov lr, ip mov lr, ip
/* Memory interfaces are working. Disable MMU and enable I-cache. */ /* Memory interfaces are working. Disable MMU and enable I-cache. */

4
cpu/s3c44b0/start.S
View File

@ -117,9 +117,9 @@ reset:
/* /*
* before relocating, we have to setup RAM timing * before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will * because memory timing is board-dependend, you will
* find a memsetup.S in your board directory. * find a lowlevel_init.S in your board directory.
*/ */
bl memsetup bl lowlevel_init
#endif #endif
relocate: /* relocate U-Boot to RAM */ relocate: /* relocate U-Boot to RAM */

4
cpu/sa1100/start.S
View File

@ -213,10 +213,10 @@ cpu_init_crit:
/* /*
* before relocating, we have to setup RAM timing * before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will * because memory timing is board-dependend, you will
* find a memsetup.S in your board directory. * find a lowlevel_init.S in your board directory.
*/ */
mov ip, lr mov ip, lr
bl memsetup bl lowlevel_init
mov lr, ip mov lr, ip
/* /*

2
doc/README.modnet50
View File

@ -47,7 +47,7 @@ Files:
cpu/arm720t/serial_netarm.c .. serial I/O for the cpu cpu/arm720t/serial_netarm.c .. serial I/O for the cpu
board/modnet50/memsetup.S .. memory setup for ModNET50 board/modnet50/lowlevel_init.S .. memory setup for ModNET50
board/modnet50/flash.c .. flash routines board/modnet50/flash.c .. flash routines
board/modnet50/modnet50.c .. some board init stuff board/modnet50/modnet50.c .. some board init stuff

2
include/configs/B2.h
View File

@ -34,7 +34,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/SX1.h
View File

@ -27,7 +27,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/VCMA9.h
View File

@ -33,7 +33,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

19
include/configs/at91rm9200dk.h
View File

@ -29,7 +29,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* ARM asynchronous clock */ /* ARM asynchronous clock */
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
@ -44,10 +44,7 @@
#define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1 #define CONFIG_INITRD_TAG 1
/* define this to include the functionality of boot.bin in u-boot */ #ifdef CONFIG_INIT_CRITICAL
#undef CONFIG_BOOTBINFUNC
#ifdef CONFIG_BOOTBINFUNC
#define CFG_USE_MAIN_OSCILLATOR 1 #define CFG_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define MC_PUIA_VAL 0x00000000 #define MC_PUIA_VAL 0x00000000
@ -77,7 +74,7 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#endif #endif /* CONFIG_INIT_CRITICAL */
/* /*
* Size of malloc() pool * Size of malloc() pool
*/ */
@ -180,19 +177,19 @@
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */ #define CFG_ENV_SIZE 0x2000 /* 0x8000 */
#else #else
#define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_IS_IN_FLASH 1
#ifdef CONFIG_BOOTBINFUNC #ifdef CONFIG_INIT_CRITICAL
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ #define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
#else #else
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */ #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */ #define CFG_ENV_SIZE 0x2000 /* 0x8000 */
#endif #endif /* CONFIG_INIT_CRITICAL */
#endif #endif /* CFG_ENV_IS_IN_DATAFLASH */
#define CFG_LOAD_ADDR 0x21000000 /* default load address */ #define CFG_LOAD_ADDR 0x21000000 /* default load address */
#ifdef CONFIG_BOOTBINFUNC #ifdef CONFIG_INIT_CRITICAL
#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ #define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
#define CFG_U_BOOT_BASE PHYS_FLASH_1 #define CFG_U_BOOT_BASE PHYS_FLASH_1
#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ #define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
@ -200,7 +197,7 @@
#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */ #define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000) #define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ #define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
#endif #endif /* CONFIG_INIT_CRITICAL */
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }

14
include/configs/cmc_pu2.h
View File

@ -29,7 +29,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* ARM asynchronous clock */ /* ARM asynchronous clock */
#define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */ #define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
@ -44,15 +44,7 @@
#define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1 #define CONFIG_INITRD_TAG 1
/* define this to include the functionality of boot.bin in u-boot */ #ifdef CONFIG_INIT_CRITICAL
#define CONFIG_BOOTBINFUNC
/* just to make sure */
#ifndef CONFIG_BOOTBINFUNC
#define CONFIG_BOOTBINFUNC
#endif
#ifdef CONFIG_BOOTBINFUNC
#define CFG_USE_MAIN_OSCILLATOR 1 #define CFG_USE_MAIN_OSCILLATOR 1
/* flash */ /* flash */
#define MC_PUIA_VAL 0x00000000 #define MC_PUIA_VAL 0x00000000
@ -82,7 +74,7 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#endif #endif /* CONFIG_INIT_CRITICAL */
/* /*
* Size of malloc() pool * Size of malloc() pool

4
include/configs/cradle.h
View File

@ -32,7 +32,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options
@ -306,7 +306,7 @@
#else #else
#define CFG_MDCNFG_VAL 0x00001aa1 /* FIXME can DTC be 01? */ #define CFG_MDCNFG_VAL 0x00001aa1 /* FIXME can DTC be 01? */
#define CFG_MDMRS_VAL 0x00000000 #define CFG_MDMRS_VAL 0x00000000
#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual bits set in memsetup.S */ #define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual bits set in lowlevel_init.S */
#endif #endif
/* /*

2
include/configs/csb226.h
View File

@ -37,7 +37,7 @@
* If we are developing, we might want to start U-Boot from ram * If we are developing, we might want to start U-Boot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

3
include/configs/dnp1110.h
View File

@ -31,8 +31,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #undef CONFIG_INIT_CRITICAL
#undef CONFIG_INIT_CRITICAL /* undef for developing */
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/ep7312.h
View File

@ -31,7 +31,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/evb4510.h
View File

@ -33,7 +33,7 @@
* Also swap the flash1 and flash2 addresses during debug. * Also swap the flash1 and flash2 addresses during debug.
* *
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/gcplus.h
View File

@ -38,7 +38,7 @@
* e.g. bootp/tftp download of the kernel is a far more convenient * e.g. bootp/tftp download of the kernel is a far more convenient
* when testing new kernels on this target. However the ADS GCPlus Linux * when testing new kernels on this target. However the ADS GCPlus Linux
* boot ROM leaves the MMU enabled when it passes control to U-Boot. So * boot ROM leaves the MMU enabled when it passes control to U-Boot. So
* we use memsetup (CONFIG_INIT_CRITICAL) to remedy that problem. * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem.
*/ */
#define CONFIG_INIT_CRITICAL #define CONFIG_INIT_CRITICAL

2
include/configs/impa7.h
View File

@ -31,7 +31,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/innokom.h
View File

@ -34,7 +34,7 @@
* If we are developing, we might want to start U-Boot from ram * If we are developing, we might want to start U-Boot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/ixdp425.h
View File

@ -41,7 +41,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */

2
include/configs/lart.h
View File

@ -31,7 +31,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/logodl.h
View File

@ -34,7 +34,7 @@
* If we are developing, we might want to start U-Boot from ram * If we are developing, we might want to start U-Boot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/lpd7a400.h
View File

@ -27,7 +27,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
#undef CONFIG_USE_IRQ #undef CONFIG_USE_IRQ

2
include/configs/lpd7a404.h
View File

@ -27,7 +27,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
#undef CONFIG_USE_IRQ #undef CONFIG_USE_IRQ

2
include/configs/lubbock.h
View File

@ -34,7 +34,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/modnet50.h
View File

@ -31,7 +31,7 @@
* If we are developing, we might want to start u-boot from ram * If we are developing, we might want to start u-boot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/mx1ads.h
View File

@ -32,7 +32,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

2
include/configs/ns9750dev.h
View File

@ -31,7 +31,7 @@
* If we are developing, we might want to start armboot from ram * If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ... * so we MUST NOT initialize critical regs like mem-timing ...
*/ */
#define CONFIG_INIT_CRITICAL /* undef for developing */ #define CONFIG_INIT_CRITICAL
/* /*
* High Level Configuration Options * High Level Configuration Options

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